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Bit Error Ratio Tester

PBT3058

Bit Error Ratio Tester


PBT3058 is a high-performance Bit Error Ratio Tester which can be used for physical layer characterization and consistency test of high-speed serial signal. It covers 1.6TBASE/CEI-224G standards and also supports PCIe rate testing ranges through extended rate.
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  • Key Features
  • Specification

Features

  • Wide Data Rate Range

    Range: 24.33 to 128 GBaud

  • Rich Test Patterns

    PRBS7 to PRBS31, PRBS7Q to PRBS31Q, SSPRQ, JP03A, JP03B, LINEAR, Square Wave, Custom Defined Pattern

  • Flexible Configuration

    Flexible test unit replacement
    Channels can be independently configured for NRZ or PAM4 signaling measurements

  • Excellent Signal Quality

    Fast rising and falling edges, low intrinsic jitter
    Supports high swing output, pre-emphasis, and independent eye height adjustment

  • Rich Features

    Supports Block Error Monitor, SER/CER/BER Estimation, Histogram Mask Monitor
    Provides 4/7/10/21-tap FIR tuner, and Inner-Eye tuner with independent control on each PAM4 level

  • Comprehensive Capabilities

    PCS layer of RS-FEC analyzer with Pre/Post BER statistics and Margin alarm
    Supports Histogram & SNR measurement

Functions and Advantages

  • Supports mill-second level transient BER sampling


    Supports mill-second level transient BER sampling (＜10ms)

  • Powerful FEC Functionality

    Supports PCS-Layer FEC Analysis

  • IEEE 802.3dj FEC Conformance Testing

    PCS BLER Analysis and Error Correction Margin Testing

  • Comprehensive Capabilities

    Supports Histogram & SNR Measurement

Specification


TX Specification

Type

Item

PBT3058

Pattern Generator

Output

Differential PAM4/NRZ

Terminal

AC Coupling

Impedance

100 Ω ±10%

Test Patterns

PRBS7/9/11/13/15/16/23/31;

PRBS7Q/9Q/11Q/13Q/15Q/16Q/23Q/31Q;

SSPRQ, JP03A, JP03B, LINEAR, Square Wave

Custom Defined Pattern (128 bits)

Symbol Rate

(GBaud)

97.32/99.5328/100/103.125/106.25/112/112.2/112.5/

112.8/113.4375/115.1/120;

Opt. EDR1 Symbol Rate (GBaud)

24.33/24.8832/25/25.78125/26.5625/27.89/27.95/

28.05/28.125/28.2/28.9/30

48.66/49.7664/51.5625/53.125/56/56.25/56.4/57.8/58/58.125/59.37/60

Opt. EDR2 Symbol Rate (GBaud)

32/64/128

Frequency Accuracy

±50 ppm (typical)

Output Amplitude[1] (Differential)

1000 mVp-p

Rise/Fall Time[2]

(20 – 80%)

< 4.5 ps

Random Jitter[3]

≤ 200 fs

MON CLK

Clock Output[4] Amplitude

> 200 mVp-p

Terminal

(Single-ended)

AC Coupled; MMCX female connector

Div Ratio (Adjustable)

Up to 32 for 24.33 – 32 GBaud

Up to 64 for 48.66 – 64 GBaud

Up to 128 for 97.32 – 128 GBaud
[1] Transmitter net measurement: 106.25 GBaud PAM4 PRBS15 (FFE disabled).
[2] 106.25 GBaud, NRZ, PRBS15.
[3] Post-Jitter-Separation measurement.
[4] Net measured output amplitude (32x division ratio at 106.25 GBaud).

RX Specification


Type

Item

PBT3058

Error Detector

Input

Differential PAM4/NRZ[1]

Terminal

AC Coupling

Impedance

100 Ω ±10%

Input Range[2] (Differential)

Max. 1000 mVp-p

Loss Threshold[3]

(Differential)

50 mVp-p

Test Patterns

PRBS7/9/11/13/15/16/23/31;

PRBS7Q/9Q/11Q/13Q/15Q/16Q/23Q/31Q;

Clock Mode

Built-in Clock Recovery
[1]  NRZ Error Detector is only supported under 24.33 – 32 GBaud.
[2]  High voltage signal may damage the receiver.
[3]  BER might increase or LOS while input signal < LOS threshold.

MCB Kit Specification


 

Type

Opt. D01

MCB Kit

DUT Type

OSFP224-IHS

Cooling Method

Built-in passive water-cooled heatsink

DMI Diagnostic

Supports CMIS/SFF protocol test

Vcc Bias Range

2.85 – 3.67 V

Vcc Bias Step

10 mV

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