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Bit Error Ratio Tester

PBT3058

1.6T Benchtop Bit Error Ratio Tester


Semight PBT3058 is a high-performance Bit Error Ratio tester (BERT) which can be used for physical layer characterization and consistency test. It covers 1.6T BASE/CEI-224G standards by virtue of support for 4-level pulse amplitude modulation (PAM4) and non-return-to-zero (NRZ) signals.
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  • Key Features
  • Specification

Features

  • Wide Data Rate Range

    Range: 24.33 ~128 GBaud

  • Flexible Configuration

    Flexible test unit replacement
    Channels can be independently configured for NRZ or PAM4 signaling

  • Excellent Signal Quality

    Fast rising and falling edges, low intrinsic jitter
    Support high swing output, pre-emphasis, and independent adjustment of eye height

  • Rich Test Code Types

    Pattern: PRBS7~31, PRBS7Q~31Q, SSPRQ, JP03A, JP03B, LINEAR, Square Wave, Custom Defined Pattern
    Trigger signal supports frequency division output (4 division to 128 division)

Functions and Advantages

  • FEC Simulation

    PreBER/PostBER Measurement
    Symbol Error Distribution
    FEC Margin Test

  • Real-time Data Monitoring

    Real-time bit error monitoring
    Stay informed about emergencies during testing

  • Historical Data Query

    Historical data query
    Data storage local database
    Call test records at any time

Specification


TX Specification

Type

Item

PBT3058

 

 

 

 

 

Pattern Generator Specification

Output

Differential PAM4 / NRZ

Terminal

AC Coupling

Impedance

100Ω+/-10%

Test Patterns

PRBS7~31, PRBS7Q~31Q, SSPRQ, JP03A, JP03B, LINEAR, Square Wave, Custom Defined Pattern (128 bits)
Symbol Rate (GBaud)
97.32/99.5328/100/103.125/106.25/112/112.2/112.5/ 112.8/113.4375/115.1/120/128

Opt. EDR1 Symbol Rate (GBaud)

24.33/24.8832/25/25.78125/26.5625/27.89/27.95/28.0 5/28.125/28.2/28.9/30 48.66/49.7664/51.5625/53.125/56/56.25/56.4/57.8/58/ 58.125/59.37/60
Opt. EDR2 Symbol Rate (GBaud)
32/64/128

Frequency Accuracy

±50 ppm (typical)

Output Amplitude[1](Differential)

1000 mVp-p

Rise/Fall Time[2] (20–80%)

＜4.5 ps
Random Jitter[3]≤ 200 fs

 

 

MON CLK

 

Clock Output[4] Amplitude

>200 mVp-p

Terminal (Single-ended)

AC Coupled; MMCX female connector

Div Ratio(Adjustable)

4/8/16/32/64/128[5]
[1] Transmitter net measurement: 106.25 GBaud PAM4 PRBS15 (FFE disabled).
[2] 106.25 GBaud, NRZ, PRBS15.
[3] Post-Jitter-Separation measurement.
[4] Net measured output amplitude (32x division ratio at 106.25 GBaud).
[5] Maximum of 128 div ratio @97.32 - 128 GBaud /64 div ratio @48.66 - 64 GBaud /32 div ratio @24.33 - 32 Gbaud.

RX Specification


TypeItemPBT3058

Error Detector

Input

Differential PAM4 / NRZ[1]
Terminal AC Coupling

Impedance

100Ω+/-10%

Input Range[2] (Differential)

Max.1000 mVp-p

Loss Threshold[3] (Differential)

50 mVp-p

Test Patterns

PRBS7 - 31, PRBS7Q - 31Q

Clock Mode

Built-in Clock Recovery
[1]  NRZ Error Detector is only supported under 24.33 - 32GBaud.
[2]  High voltage signal may damage the receiver.
[3]  BER might increase or LOS while input signal < LOS threshold.

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