1. Basic Introduction

In semiconductor manufacturing, process reliability refers to assessing whether the manufacturing process itself can ensure the stability of devices during long-term use by testing specific structures. Package Level Reliability (PLR) is the primary means of achieving this assessment (the other means being Wafer Level Reliability or WLR). PLR typically involves packaging devices within test structures (such as MOSFETs or metal lines)—for example, using dual-in-line ceramic packaging—and then sending them into specialized PLR test equipment for long-duration stress testing to accurately measure specific physical failures.

In PLR, TDDB, HCI, BTI, and EM are the "four pillars" for evaluating semiconductor process lifetime. These tests are no longer about seeing if the entire chip works well, but rather about dismantling the process layer by layer through packaged test structures to observe the underlying physical failure mechanisms.

2. Analysis of Traditional Electrical Failure Mechanisms

2.1. TDDB (Time-Dependent Dielectric Breakdown)

Time-dependent dielectric breakdown. This is a test of the "insulation layer" lifetime.

• Physical Nature: When an electric field is applied to the Gate, defects gradually develop inside the oxide layer. When these defects form a continuous path, the insulating layer instantly becomes a conductor, leading to device burnout.

• PLR Test Focus: As oxide layers become increasingly thin, breakdown is highly sensitive. PLR observes the point in time when the gate leakage current (Ig) undergoes a sudden change by applying Constant Voltage Stress (CVS) or Constant Current Stress (CCS).

• Core Metric: TBD (Time to Breakdown). Through long-term PLR data, we can establish voltage acceleration models to predict whether the oxide layer can last over 10 years under normal operating voltage (e.g., 1.1V).

• Physical Model: E-model or 1/E-model.

• Reference Standard: JESD92 (Standard for testing gate oxide integrity).

2.2. HCI (Hot Carrier Injection)

Hot carrier injection. This is a test of "high-frequency switching" loss.

• Physical Nature: Carriers (electrons or holes) gain extremely high energy (becoming "hot") under a strong electric field, breaking through the potential barrier and getting "trapped" in the oxide layer. This causes a shift in the transistor's threshold voltage (VTH).

• PLR Test Focus: HCI primarily occurs at the moment the device switches. In PLR, we apply high voltage to the Drain and measure the degradation percentage of the gate saturation current IDSAT or VTH at high temperatures (for example, a 10% degradation is judged as failure).

• Advantage: Unlike WLR, PLR can capture long-term HCI degradation trends at lower voltages.

• Physical Model: Vds acceleration model.

• Reference Standards: JESD28 (Quasi-static HCI evaluation method at the transistor level) and JESD60 (Testing procedures specifically for key hot carrier effects).

2.3. BTI (Bias Temperature Instability)

Bias temperature instability. This includes the common NBTI (for PMOS) and PBTI (for NMOS).

• Physical Nature: When the gate is in a constantly open (biased) state and the temperature is high, the Si-H bonds at the interface break, generating trap charges that lead to threshold voltage (VTH) drift.

• PLR Test Focus: Threshold voltage (Vth). However, BTI has a very troublesome characteristic—the Recovery Effect. Once stress is removed, the degradation recovers rapidly.

• Advantage: Basic PLR testing can be performed in a controlled high-temperature oven for very precise, biased, long-term monitoring, thereby better capturing this slow degradation that varies with temperature.

• Physical Model: Arrhenius model (temperature-dependent).

• Reference Standard: JESD90 (A physical model-based BTI measurement method).

The figure below illustrates the specific locations where these three primary failure mechanisms occur within the transistor structure.

2.4. EM (Electromigration)

Electromigration. This is a test of the physical loss of "metal interconnects."

• Physical Nature: Under high current density, electrons "strike" metal atoms like a flood, causing physical displacement of atoms, which eventually leads to wires thinning or even breaking (open circuit) in some places, or accumulating to cause short circuits in others.

• PLR Test Focus: Assessing the current-carrying capacity and associated resistance values of metal lines (Al or Cu) and vias.

• Advantage: EM testing typically requires thousands of hours. Although WLR offers fast testing with extremely high currents, the heat generated by such extreme currents (Joule Heating) interferes with the physical model. PLR is the standard means for obtaining high-precision Ea (activation energy).

• Physical Model: Black’s Equation.

• Reference Standards: JESD61, JESD87, JESD202, etc.

3. Pain Points of BTI Testing: Recovery Effect and Data Distortion

Traditional PLR test equipment faces serious challenges when executing BTI tests:

• Recovery Effect: When testing stress is paused, device damage partially repairs within a few milliseconds.

• Lifetime Overestimation: Traditional PLR equipment with slower measurement speeds cannot capture the worst-case damage, leading to an overestimation of device lifetime.

• Security Risks: Lack of channel-level independent protection means a single-point failure could affect the device itself or adjacent devices.

• Workflow Disruption: Data often exists in silos, requiring engineers to export large amounts of data to third-party software to visualize degradation curves.

4. Semight Solution: On-The-Fly (OTF) Measurement Technology

The PLR0010 system developed by Semight Instruments utilizes advanced On-The-Fly (OTF) measurement technology to eliminate the "Recovery Effect" produced during measurement delays:

• Continuous Drain Current (ID) Monitoring: Unlike traditional Measure-Stress-Measure (MSM) methods, the PLR0010 can maintain a tiny drain bias during the stress phase and continuously sample drain current (ID) every 90 microseconds. This method captures the true degradation curve.

• Fast Threshold Voltage (Vth) Extraction: For threshold voltage measurement, the system possesses microsecond-level pulse testing capabilities and uses a high-speed scanning algorithm based on maximum transconductance (Gm-max).

• Capturing Fast Traps: The "non-stress" time (interruption time) is shortened to approximately 200µs, ensuring that "fast traps" are captured before they relax.

Intuitive Comparison: OTF vs. Standard MSM Method: The figure below shows the key differences between the two. In standard "Measure-Stress-Measure (MSM)" mode, the gap created by removing stress causes device recovery, resulting in data loss. Conversely, in OTF mode, stress is continuous, enabling the capture of true "worst-case" degradation. OTF technology ensures more accurate data capture.

By continuously monitoring device degradation (such as linear drain current) without removing stress voltage, the PLR0010 can capture "fast traps" and true degradation data that are frequently missed by traditional MSM cycles.

5. Architectural Advantages and Key Metrics of the Semight PLR0010 System

The PLR0010 system is specifically designed to meet stringent JEDEC standards, achieving a high degree of integration between hardware precision and software intelligence.

5.1. Hardware Performance and Stability

• High-Temperature Environment: Supports a stable testing environment up to $250^{\circ}C$, meeting requirements for highly accelerated life testing.

• Independent Channel Protection: Each channel has built-in independent overcurrent protection logic; if a single device fails, it is immediately isolated physically to ensure the safety of expensive prototype devices.

• High-Throughput Buffer: Each test supports raw data collection of up to 50,000 points, ensuring the smoothness of complex degradation curves.

5.2. Software Integration and Data Analysis

• One-Stop Visualization: Built-in powerful plotting engine supports generating degradation curves, lifetime prediction graphs, and trend analysis directly within the software, without relying on third-party tools.

• Production Automation: Seamlessly interfaces with Equipment Automation Programs (EAP) to ensure data traceability in large-scale mass production testing.